Jie Yu

Computer Science and Engineering
University of Michigan

jieyu [AT] umich.edu
jieyu [AT] apache.org
jieyu@github
@jie_yu

About Me

I received my PhD in Computer Science and Engineering from the University of Michigan in August 2013. My PhD advisor is Prof. Satish Narayanasamy. I got my master degree in Computer Science and Engineering from the University of Michigan in May 2010, and my bachelor degree in Software Engineering from Fudan University (P.R.China) in July 2007.

I am currently working for Twitter, Inc., and is a committer of the Apache Mesos project.

Research Interests

I am seeking solutions to improve the programmability and reliability of computer systems, with particular focus on reliable parallel systems, parallel programming model and concurrent software testing.

Software

• Maple, a dynamic analysis framework for multi-threaded programs.
• A collection of Concurrency Bugs for benchmarking concurrency analysis tools.

Selected Publications

• Chun-Hung Hsiao, Jie Yu, Satish Narayanasamy, Ziyun Kong, Cristiano L Pereira, Gilles A Pokam, Peter Chen and Jason Flinn. Race Detection for Event-Driven Mobile Applications. To appear in the 35th annual ACM SIGPLAN conference on Programming Language Design and Implementation, June 2014. (PLDI'14)


• Jie Yu, Satish Narayanasamy, Cristiano Pereira and Gilles Pokam. Maple: A Coverage-Driven Testing Tool for Multithreaded Programs. In Proceedings of the 27th ACM SIGPLAN Conference on Object-Oriented Programming, Systems, Languages and Applications, October 2012. (OOPSLA'12) [ pdf ] [ slides ]


• Haibo Chen, Jie Yu, Chengqun Hang, Pen-chung Yew and Binyu Zang. Dynamic Software Updating Using a Relaxed Consistency Model. In IEEE Transactions on Software Engineering, September 2011. (IEEE-TSE)


• Jie Yu and Satish Narayanasamy. Tolerating Concurrency Bugs Using Transactions as Lifeguards. In Proceedings of the 43th IEEE/ACM International Symposium on Microarchitecture, December 2010. (MICRO'10) [ pdf ] [ slides ]


• Jie Yu and Satish Narayanasamy. A Case for an Interleaving Constrained Shared-Memory Multi-Processor. In Proceedings of the 36th International Symposium on Computer Architecture, June 2009. (ISCA'09) [ pdf ] [ slides ]


• Haibo Chen, Jie Yu, Rong Chen, Binyu Zang, and Pen-chung Yew. POLUS: A POwerful Live Updating System. In Proceedings of the 29th International Conference on Software Engineering, May 2007. (ICSE'07) [ pdf ] [ slides ]